Memory devices are commonly used to store information (either temporarily or permanently) in a number of applications; for example, in a non-volatile memory device the information is preserved even when a power supply is off. Typically, the memory device includes a matrix of memory cells (for example, consisting of floating gate MOS transistors); each memory cell has a threshold voltage that can be programmed to different levels representing corresponding logical values. Particularly, in a multi-level memory device each cell can take more than two levels (and then store a plurality of bits).
The logical values stored in selected cells of the memory device are read by comparing a current flowing through each memory cell with the currents provided by reference cells in predefined conditions. For this purpose, a suitable biasing voltage is applied to the selected memory cells and to the reference cells.
A different technique is disclosed in EP-A-1467377 (the entire disclosure of which is herein incorporated by reference). This document proposes the use of a biasing voltage having a monotonic time pattern; preferably, the waveform of the biasing voltage consists of a ramp, which increases linearly over time with a constant slope. In this case, each selected memory cell and the reference cells turn on at different times (as soon as the biasing voltage reaches their threshold voltages). The temporal order of the turning on of the memory cell with respect to the ones of the reference cells uniquely identifies the logical value stored therein. In this way, the precision of the reading operation is strongly improved and made independent of most external factors.
Similar considerations apply to a program verify operation, which is typically performed to verify the correct programming of selected memory cells. For this purpose, each selected memory cell is compared with a further reference cell having a threshold voltage slightly higher than the one corresponding to the target logical value (so as to ensure that the memory cell has been brought to the desired condition with a high degree of confidence).
A problem of some memory devices known in the art is the possible incorrect setting of the several reference cells. Indeed, the difference between the threshold voltages of each pair of adjacent reference cells typically must be maintained at a predefined value with a very high accuracy, since any drift reduces a window that is available to discriminate the corresponding conditions of the selected memory cells. This problem is particularly acute for each reference cell used for the read operation and the corresponding reference cell used for the program-verify operation; indeed, in this case the difference between the two threshold voltages is very low (for example, of the order of 80-110 mV).
Therefore, the setting of the reference cells typically requires a very accurate trimming of their threshold voltages. This increases the production time of the memory devices, with a detrimental impact on their costs.